
COMMERCIALTEMPERATURERANGE
IDTCV142
PROGRAMMABLEFLEXPCCLOCKFORP4PROCESSOR
7
BYTE 5
Bit
Output(s) Affected
Description / Function
0
1
Type
Power On
0
CPU0, CPU0#
CPU0 PD drive mode
Driven in power down
Tristate in power down
RW
0
1
CPU1, CPU1#
CPU1 PD drive mode
Driven in power down
Tristate in power down
RW
0
2
CPU2, CPU2#
CPU2 PD drive mode
Driven in power down
Tristate in power down
RW
0
3
SRCS
SRC PD drive mode
Driven in power down
Tristate in power down
RW
0
4
CPU0
CPU0 CPU_STOP drive mode
Driven in CPU_STOP#
Tristatewhenstopped
RW
0
5
CPU1
CPU1 CPU_STOP drive mode
Driven in CPU_STOP#
Tristatewhenstopped
RW
0
6
CPU2
CPU2 CPU_STOP drive mode
Driven in CPU_STOP#
Tristatewhenstopped
RW
0
7
SRCS
SRC PCI_STOP drive mode
Driven in PCI_STOP
Tristatewhenstopped
RW
0
BYTE 7
Bit
Output(s) Affected
Description / Function
0
1
Type
Power On
0
Vendor ID
R
1
Vendor ID
R
0
2
Vendor ID
R
1
3
Vendor ID
R
0
4
Revision ID
R
0
5
Revision ID
R
0
6
Revision ID
R
0
7
Revision ID
R
0
BYTE 6
Bit
Output(s) Affected
Description / Function
0
1
Type
Power On
0
CPU[2:0]
FSA latched value on power up
R
FSA
1
CPU[2:0]
FSB latched value on power up
R
FSB
2
CPU[2:0]
FSC latched value on power up
R
FSC
3
PCI, SRC
Software PCI_STOP control for
Stop all PCI, PCIF, and
Software STOP
RW
1
PCI and SRC CLK
SRC which can be stopped
Disabled
by PCI_STOP#
4
REF
REF drive strength
1x drive
2x drive
RW
1
5
Reserved
RW
0
6
Test clock mode entry control
Normaloperation
Testmode,controlled
RW
0
by Byte 6, Bit 7
7
CPU, SRC, PCI
Only valid when Byte 6, Bit 7
Hi-Z
REF/N
RW
0
PCIF, REF,
is HIGH
USB48, DOT96